Software Engineer — Computation Kernels and Performance

The role

You will build core computation software for custom AI accelerators. This includes developing low-level software primitives, performance-critical kernels, and hardware abstraction layers.

What you will do

• Develop and optimize low-level software primitives in C/C++, assembly, and architecture-specific intrinsics, primarily for RISC-V and ARM platforms.
• Implement performance-critical kernels, runtime components, hardware abstraction layers, drivers, and firmware operating in bare-metal or highly constrained environments.
• Work closely with hardware architects and RTL/design teams to define and validate hardware-software interfaces, memory maps, register interfaces, interrupts, synchronization mechanisms, and boot flows
• Analyze and optimize software for latency, throughput, memory footprint, instruction count, and efficient use of processor and accelerator features.
• Bring up and debug software on simulation, emulation, FPGA, and silicon platforms, including low-level hardware/software integration issues.
• Develop validation tests, benchmarks, and diagnostic tools for new processor, DSP, accelerator, and SoC functionality.
• Contribute to architecture decisions around ISA extensions, compiler intrinsics, memory hierarchy, DMA, cache/coherency behavior, and software-visible hardware features.

Required qualifications

• Bachelor’s, Master’s, or PhD in Computer Science, Computer Engineering, or a related field.
• Strong experience in low-level systems programming using C/C++ and assembly, with excellent understanding of how compiled software maps to machine instructions and hardware behavior.
• Deep familiarity with bare-metal development, including startup code, linker scripts, memory layout, MMIO, interrupts/exceptions, timers, synchronization, and direct peripheral access.
• Strong understanding of computer architecture, including pipelines, caches, memory hierarchies, virtual/physical addressing, atomics, DMA, and performance implications of different access patterns.
• Hands-on experience with RISC-V and/or ARM architectures, instruction sets, calling conventions, ABI concepts, and architecture-specific intrinsics.
• Experience debugging hardware/software interactions using tools such as GDB, JTAG, trace/debug interfaces, simulators, emulators, or FPGA platforms.
• Ability to read hardware specifications, register descriptions, and RTL-level documentation and translate them into robust software implementations.
• Strong performance-analysis and optimization skills, including profiling, disassembly inspection, compiler optimization behavior, and hand-tuned assembly where appropriate.
• English at a proficient level.

Nice to have

• French is a plus

Benefits

• Competitive cash compensation
• Meaningful stock option plan
• Relocation bonus and coverage of moving expenses for relocation within 20 minutes of the company’s location
• Healthcare coverage (including family-friendly options)
• pension contributions
• professional development support
• 25 days of PTO, in addition to public holidays
• Ownership of a key technical domain
• Reimbursement of 50% of the public transport subscription fee

Before you apply

• Screening Call
• Technical meeting
• CEO Interview
• Mandatory calls with your former managers to validate strengths, weaknesses, and work style
• Technical Assessment: Take-home technical assignment

About the company

Arago is an AI and computer hardware company whose mission is to drive the course of history forward by accelerating breakthroughs at the intersection of AI and semiconductors. Founded in 2024, it brings together a lean team of engineers and scientists.