Etched
Design Verification Engineer - Internal IP
Austin. Posted 7 months ago
The role
You will ensure custom IPs including systolic arrays, DMA engines, and NoCs are robust and silicon-ready. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance.
What you will do
- Develop and maintain UVM/SystemVerilog testbenches for high-performance IPs
- Define and execute verification plans covering functional correctness, corner cases, concurrency, and performance bottlenecks
- Debug complex datapath and protocol issues in RTL and testbench environments
- Work closely with architects and designers to validate functionality and design intent
- Partner with SW, FW, and emulation teams to ensure end-to-end bring-up and debug coverage
- Contribute to reusable DV infrastructure, coverage models, and methodology improvements
Required qualifications
- Proficiency with UVM and SystemVerilog
- Strong debugging and problem-solving skills for complex digital designs
- Solid knowledge of computer architecture and digital design fundamentals
- Hands-on experience verifying datapaths, memory systems, interconnects, or high-throughput fabrics
Nice to have
- Familiarity with SystemVerilog Assertions (SVA) and formal verification techniques
- Experience verifying systolic arrays, DMA engines, or NoC/AXI protocols
- Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows
Benefits
- Medical, dental, and vision packages with generous premium coverage
- $500 per month credit for waiving medical benefits
- Various wellness benefits covering fitness, mental health, and more
- Daily lunch + dinner in our office
- Unlimited compute budget subject to ROI justification
About the company
Etched is building hardware for frontier intelligence by co-designing chips, racks, software, and manufacturing. The company is an inference-focused frontier AI system.