Silicon Validation Engineer, Software

The role

You will develop firmware and low-level software to validate AI/ML accelerator ASICs. This includes work from pre-silicon emulation and FPGA prototyping through post-silicon bring-up, characterization, and production ramp.

What you will do

• Develop and own low-level validation firmware in C/C++
• Drive early bring-up of first silicon including boot, initialization, and feature enablement
• Perform deep-dive debug of silicon issues spanning firmware, RTL, electrical, protocol, and system levels
• Build firmware infrastructure including hardware abstraction layers and low-level device drivers
• Develop and extend validation automation, result-capture, and regression frameworks
• Author firmware-driven test plans and define coverage metrics
• Validate and characterize custom IP blocks and accelerator components
• Use debug consoles and lab tooling for silicon debug and characterization
• Collaborate with design, verification, architecture, DFT, and driver teams

Required qualifications

• Proficiency in C/C++ for firmware and bare-metal development
• Python for validation automation and scripting
• Understanding of SoC/computer architecture (CPU cores, memory subsystems, caches, interconnects)
• Solid low-level/embedded fundamentals: bootloaders, hardware abstraction layers, device drivers, register/interrupt programming, and bare-metal or RTOS environments
• Knowledge and familiarity developing and debugging in Linux environments
• Strong problem-solving, analytical, and cross-functional collaboration skills
• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field

Nice to have

• Master's degree
• 2+ years of experience developing firmware / embedded software for ASICs or SoCs
• Hands-on experience with silicon bring-up and low-level debug
• Experience with JTAG and debuggers (e.g., Lauterbach/GDB) and serial/UART debug consoles
• Experience across both pre-silicon and post-silicon environments
• Experience with one or more high-speed interfaces: PCIe, DDR/LPDDR/HBM, SerDes, or die-to-die / chiplet interconnect
• Experience building test/validation automation and regression frameworks (CI/CD)
• RTOS experience (FreeRTOS, Zephyr, NuttX) or RISC-V firmware development
• Familiarity with platform/system firmware (UEFI, ACPI, BMC, BIOS)
• Ability to read RTL (Verilog/SystemVerilog) and debug in simulation

Benefits

• Medical, dental, and vision packages with generous premium coverage
• $500 per month credit for waiving medical benefits
• Housing subsidy of $2.5k per month for those living within walking distance of the office
• Relocation support for those moving to San Jose (Santana Row)
• Various wellness benefits covering fitness, mental health, and more
• Daily lunch and dinner in our office
• Unlimited compute budget subject to ROI justification

About the company

Etched is building hardware for frontier intelligence by co-designing chips, racks, software, and manufacturing. They are a fully in-person team in San Jose (Santana Row).