Product Engineer, Silicon Validation

The role

You will lead silicon validation, test program development, and productization for large-format AI accelerator chips. This involves developing test strategies from first silicon through high-volume manufacturing.

What you will do

• Plan and execute silicon characterization from first silicon through production release
• Lead test cost optimization efforts
• Architect test flows to balance test time, coverage, and yield learning
• Drive systematic yield improvement initiatives using statistical tools
• Establish and track key quality metrics including DPPM and test escapes
• Perform die/package level bring-ups and troubleshoot failure modes
• Support OSAT bring-up and manage ATE/SLT manufacturing test program releases
• Productize test programs and methodologies for high-volume manufacturing
• Analyze field return data and system-level failures to identify test coverage gaps
• Drive ATE-system correlation activities and manage relationships with vendors and partners

Required qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
• 5-10+ years of hands-on experience in silicon validation, product engineering, and ATE test development for advanced node semiconductors
• Proven track record in yield optimization and DPPM reduction with quantifiable results
• Experience with silicon characterization methodologies including Fmax/Vmin characterization and power/thermal validation
• High-volume manufacturing test experience with demonstrated production scale results
• Proficiency in yield and fail pareto analysis using JMP, Exensio, DataPower, or OptimalPlus
• Strong understanding of test program debugging, failure analysis correlation, and yield enhancement techniques

Nice to have

• Experience developing and optimizing ATE test programs for wafer sort and final test on Advantest V93K platforms
• Experience managing wafer sort and final test across multiple advanced process nodes
• GPU, HPC, or AI accelerator chip testing background with production scale results
• HBM or high-speed memory interface testing and characterization experience
• Leading NPI through high-volume production with multi-vendor qualification across multiple OSAT sites
• Driving significant cost reduction initiatives
• Multi-site parallel testing strategies and test time optimization for large-format dies
• Scripting and automation skills (Python, Perl, TCL) for test data analysis and workflow automation
• Cross-functional leadership in silicon bring-up and manufacturing ramp

Benefits

• Medical, dental, and vision packages with generous premium coverage
• $500 per month credit for waiving medical benefits
• Housing subsidy of $2.5k per month for those living within walking distance of the office
• Relocation support for those moving to San Jose (Santana Row)
• Various wellness benefits covering fitness, mental health, and more
• Daily lunch and dinner in our office
• Unlimited compute budget subject to ROI justification

About the company

Etched is building hardware for frontier intelligence by co-designing chips, racks, software, and manufacturing. They are a fully in-person team in San Jose (Santana Row).