AMS Engineer

The role

You will own the verification of analog and mixed-signal blocks across high-speed IO RX/TX chains. You will build models, environments, and methodology to find bugs in silicon-accurate simulation.

What you will do

• Own the verification strategy and test plan for mixed-signal subsystems.
• Define the modeling approach and fidelity tiers.
• Develop and validate analog behavioral models against transistor-level references.
• Build self-checking testbenches and reusable verification components.
• Drive AMS co-simulation flows.
• Define functional coverage and assertions that target analog corner behavior.
• Debug and root-cause failures across the analog/digital boundary.
• Partner with analog and DSP designers to review specs and translate analog intent.
• Own block- and subsystem-level verification sign-off for tape-out.
• Build and maintain regression infrastructure and flow automation.

Required qualifications

• BS/MS in Electrical Engineering or related field
• 5+ years of analog/mixed-signal verification experience on complex SoCs or mixed-signal IP
• Hands-on expertise with AMS modeling and verification: Verilog-AMS and real-number modeling (SystemVerilog real / wreal)
• Experience with analog-digital co-simulation flows (e.g., Spectre AMS, FastSpice coupled with a digital simulator)
• Proficiency in SystemVerilog
• Solid assertion-based verification skills
• Ability to architect self-checking testbenches and reusable verification components
• Ability to model analog blocks at the appropriate level of abstraction and validate against transistor-level references
• Strong debug skills across the analog/digital boundary
• Comfort reading analog schematics and specifications
• Ability to collaborate directly with analog and DSP designers

Nice to have

• Strong working knowledge of high-speed SerDes / wireline architectures - CDR and clock recovery, equalization (CTLE, DFE), PLLs and clocking, samplers/slicers, and serialization/deserialization
• Experience verifying calibration and adaptation loops and clock-domain-crossing logic
• UVM or other constrained-random, metric-driven verification experience
• Scripting for regression and flow automation (Python, TCL, Make)
• Track record of mixed-signal IP sign-off through tape-out, plus silicon bring-up and measurement correlation
• A clear understanding of where AMS verification ends and transistor-level performance sign-off begins

Benefits

• Competitive Salary
• Meaningful stock options
• Annual Living-Local Bonus if your residence is within 20 minutes of the office
• Employer-contributed retirement plans

Before you apply

• Candidates eligibility to work at OLIX depends on their most recent citizenship or permanent residency status.
• OLIX is generally unable to consider applicants whose most recent citizenship or permanent residence is in certain restricted countries (currently including Iran, North Korea, Syria, Cuba, Russia, Bel

About the company

OLIX is designing the OLIX Decode Accelerator 1 (DX-1), a new paradigm for AI computing using optics and high-speed interconnect.