Senior/Staff Digital Design Engineer

The role

Senior/Staff Digital Design Engineers will take end-to-end ownership of high-speed, real-time data-processing silicon. This includes work from early algorithm modelling to verified RTL and silicon bring-up.

What you will do

• Architect, design and implement high-throughput digital pipelines in advanced CMOS nodes
• Prototype and iterate rapidly in FPGA
• Model algorithms and validate concepts in MATLAB/Simulink or equivalent
• Own RTL development including synthesis, static-timing closure, formal and constrained-random verification
• Analyse power, performance and area
• Collaborate with optical-hardware, mixed-signal and software teams
• Mentor junior engineers, lead design reviews and champion best-practice design methodologies

Required qualifications

• 7+ years of hands-on digital design for high-performance ASICs or SoCs
• Ownership of at least one product that processes a continuous real-time data stream
• Proven success closing timing on multi-hundred-MHz to multi-GHz clock domains
• Integrating high-speed IP (e.g., SerDes, HBM/DDR, PCIe, 100 GbE or similar)
• Expertise with industry-standard EDA flows: RTL synthesis, CDC/RDC, STA, power-intent (UPF/CPF), lint, and gate-level simulation
• Demonstrated FPGA prototyping skills: constraint management, transceiver tuning, and hardware debug in the lab
• Proficiency using MATLAB/Simulink or Python/NumPy for algorithm modelling, fixed-point analysis and test-vector generation
• Solid grounding in digital signal-processing concepts, computer-architecture fundamentals and semiconductor device physics
• Excellent communication and cross-functional collaboration abilities

Nice to have

• Tape-out experience on an advanced process node
• Knowledge of coherent optical links or photonic-electronic co-design
• Familiarity with AI/ML workloads, systolic arrays or tensor-processing architectures
• Contributions to open-source RTL, verification frameworks or FPGA boards

Benefits

• Meaningful stock options
• Annual Living-Local Bonus if your residence is within 20 minutes of the office
• Employer-contributed retirement plans

Before you apply

• Candidates eligibility to work at OLIX depends on their most recent citizenship or permanent residency status
• Generally unable to consider applicants whose most recent citizenship or permanent residence is in certain restricted countries (currently including Iran, North Korea, Syria, Cuba, Russia, Belarus, Ch

About the company

OLIX is building the OLIX Decode Accelerator 1 (DX-1), the first accelerator architected specifically for decode. The company aims to address the infrastructure gap in AI by creating a new paradigm for hardware.