Analog Layout Lead

The role

The Analog Layout Lead will drive full-custom analog and mixed-signal layout for next-generation silicon platforms. This person will lead physical implementation across advanced CMOS nodes and establish layout methodologies.

What you will do

• Lead full-custom layout of complex analog and mixed-signal blocks.
• Define and enforce analog layout methodologies, design rules, and best practices.
• Drive parasitic-aware layout strategies.
• Collaborate with circuit designers to translate schematic intent into physical implementations.
• Own physical verification closure including DRC, LVS, and antenna checks.
• Establish floorplanning and integration strategies for analog IP blocks.
• Provide technical guidance and layout direction to engineers and contractors.
• Partner with process technology and design kit teams to evaluate new process nodes.
• Own long-term physical design roadmaps and methodology investments.

Required qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, relevant technical field, or equivalent practical experience.
• 8+ years of experience in full-custom analog and mixed-signal layout for production silicon in advanced CMOS process nodes.
• 8+ years of hands-on experience with industry-standard layout tools such as Cadence Virtuoso.
• Experience leading layout of high-performance analog blocks from concept through tape-out.
• Experience defining and implementing layout methodologies for matching, shielding, noise isolation, and signal integrity.
• Experience collaborating with circuit design teams to translate simulation requirements into layout constraints.
• Experience managing, mentoring, and reviewing the work of layout engineers and coordinating with external contractors.

Nice to have

• Familiarity with post-layout simulation flows, including RC extraction and back-annotated verification using tools such as Spectre or Calibre.
• Experience contributing to or evaluating process design kits and design rule documentation for new process node bring-up.
• Experience with analog layout for photonics, AI infrastructure, consumer wearable, mobile, or IoT SoCs.
• Experience with 3D stacking technologies, advanced packaging layout considerations, or reusable analog layout templates.

Benefits

• Competitive salary commensurate with experience
• Comprehensive benefits package including health insurance
• Professional development opportunities and certification support
• Access to cutting-edge technology and cloud platforms

About the company

Lumilens is building photonics infrastructure for AI supercomputing. It is a well-funded startup backed by Mayfield.