Lumilens
Sr. Physical Design Engineer
San Jose. Posted 4 months ago
The role
The Senior Physical Design Engineer will own physical implementation from RTL to GDSII for high-performance ASICs using TSMC advanced process nodes. This role involves driving timing and power closure for ultra-high-speed designs.
What you will do
- Own full-chip and block-level physical implementation including floorplanning, placement, CTS, routing, and physical verification.
- Collaborate with RTL and STA teams for timing, area, and power closure.
- Apply physical design techniques for multi-voltage and multi-frequency domains, hierarchical implementation, and congestion mitigation.
- Perform tapeout signoff activities including PV, EM/IR, ESD and ejobview.
Required qualifications
- Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related field.
- 8+ years of hands-on physical design experience.
- Experience with floorplanning, placement, CTS, routing, IR drop mitigation, timing closure, and signoff debugging.
- Hands-on experience with tools such as Synopsys ICC2, RedHawk SC, Cadence Innovus, Voltus, Simens Calibre etc.
- Strong scripting skills in Tcl, Python, or Perl.
Nice to have
- Experience with advanced technology nodes at 5nm or below.
- Experience with high-speed PHY such as SerDes, UCIe etc physical design implementation.
- Familiarity with EM/IR analysis, power grid optimization, congestion analysis, physical verification, and tapeout signoff in advanced semiconductor process nodes.
- Experience supporting high-frequency datapath or DSP-heavy designs.
- Experience with TSMC CoWoS or SoIC-X design experience.
Benefits
- Competitive salary commensurate with experience
- Comprehensive benefits package including health insurance
- Professional development opportunities and certification support
- Access to cutting-edge technology and cloud platforms
- Collaborative work environment with cross-functional teams
About the company
Lumilens is building photonics infrastructure for AI supercomputing, including chip-to-chip optical interconnects and scalable photonic engines. It is a well-funded startup backed by Mayfield and others.