Lumilens

IC/RTL Design Engineer

San Jose. Posted 4 months ago

The role

You will design and implement digital front-end RTL, including high-speed datapaths between UCIe and the optical front end. You will take blocks from micro-architecture through timing-aware RTL and block-level verification.

What you will do

  • Develop block-level micro-architecture and contribute to interface and register definitions.
  • Design and implement front-end RTL blocks in SystemVerilog.
  • Integrate IP and support parameterization for configurability.
  • Write clean, lint-clean, CDC/RDC-clean RTL following coding and quality standards.
  • Write block-level testbenches, sanity checks, and assertions for blocks.
  • Perform power- and timing-aware design including clock-gating, pipelining, and retiming.
  • Partner with the backend team on physical closure for blocks.
  • Bring-up and debug across simulation and emulation or FPGA prototyping.
  • Support DV and silicon bring-up, including DFT/debug hooks.
  • Collaborate with architecture, modelling, DV, DFT, and backend teams.

Required qualifications

  • BS or MS in Electrical/Computer Engineering or equivalent experience.
  • 3+ years of digital RTL design in SystemVerilog.
  • Solid digital design fundamentals: pipelining, FSMs, FIFOs, clock-domain crossing, and streaming/bus interfaces (e.g., AXI).
  • Lint and CDC/RDC discipline and clean-RTL practices.
  • Power- and timing-aware design practices.
  • Comfort with synthesis and timing closure, working with the backend team.
  • Strong debug skills in simulation.
  • Scripting in Python, Perl, or TCL.

Nice to have

  • High-speed datapath, SerDes-adjacent, or interface design exposure (UCIe, PCIe/CXL, or similar).
  • FEC/coding datapath familiarity (e.g., Reed-Solomon) and gray-code mapping.
  • Assertion-based verification (SVA) and familiarity with UVM block-level testbenches.
  • Emulation / FPGA prototyping experience.
  • Exposure to scale-up / scale-out interconnects or network switch / NIC / memory-controller datapaths.
  • Low-power / UPF and DFT (scan) concepts.
  • Optical transceiver, CPO, or linear-drive optics background.
  • Advanced-node (N5/N3/N2) design experience.

About the company

lumilens

IC/RTL Design Engineer at Lumilens | JobZoey