Senior Digital Design Engineer

The role

The Senior Digital Design Engineer will design and implement complex digital systems and SoC components. This role involves owning functional blocks from microarchitecture through RTL development, integration, and implementation.

What you will do

• Develop microarchitecture for assigned digital blocks and subsystems
• Design, code, and maintain high-quality, synthesizable RTL
• Evaluate design tradeoffs involving performance, power, area (PPA), and testability
• Participate in design reviews and incorporate feedback into RTL implementation
• Integrate RTL into larger subsystem and SoC environments
• Support lint, CDC/RDC, synthesis, and design quality checks
• Collaborate with physical design teams to resolve implementation issues
• Assist with timing constraint development and timing closure activities
• Support logic equivalence checking (LEC) and implementation debugging
• Participate in functional and timing ECO development when required

Required qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related discipline
• 6+ years of digital IC design experience
• Strong hands-on RTL development experience using Verilog or SystemVerilog
• Experience designing digital blocks for complex SoCs or ASICs
• Solid understanding of RTL design and microarchitecture
• Solid understanding of SoC integration and standard on-chip interfaces
• Solid understanding of clocking, resets, CDC/RDC methodologies
• Solid understanding of synthesis and physical implementation considerations
• Solid understanding of timing constraints (SDC) and timing closure
• Experience with industry-standard EDA tools (Synopsys and/or Cadence)
• Strong debugging, analytical, and problem-solving skills
• Excellent communication and collaboration skills

Nice to have

• Experience with DFT methodologies including scan insertion and MBIST
• Experience with logic equivalence checking (LEC)
• Familiarity with static timing analysis (STA)
• Experience with UPF/CPF low-power methodologies
• Exposure to advanced semiconductor process nodes
• Experience supporting silicon bring-up and post-silicon debug
• Formal verification experience

Benefits

• Stock option grant
• Comprehensive benefits package including health, dental, vision, and 401(k)

About the company

Powerlattice is a well-funded semiconductor start-up company backed by leading Silicon Valley venture capital firms. They are developing chiplet power delivery technology for high-performance processors.