Senior or Staff Design Verification Engineer

The role

The Design Verification Lead will spearhead verification activities for complex SoC/IP designs. This person will develop SystemVerilog-based verification environments, strategies, and automated regression flows.

What you will do

• Lead verification planning and execution for complex digital and mixed-signal subsystems.
• Architect, develop, and maintain SystemVerilog-based verification environments.
• Develop directed, constrained-random, regression, and corner-case tests.
• Develop reusable verification components and protocol-based test infrastructure.
• Perform and support Clock Domain Crossing (CDC) verification.
• Develop and maintain UVM-based infrastructure and RAL models.
• Develop checkers, scoreboards, reference models, assertions, and functional coverage.
• Perform RTL and gate-level simulation.
• Develop and optimize regression and GLS flows using Xcelium and VCS.
• Analyze functional and code coverage and drive coverage closure.

Required qualifications

• Bachelor's or master's degree in electrical engineering, Computer Engineering, or related field
• 10+ years of experience in digital verification of SoCs with proven ownership of subsystems or full-chip verification
• Understanding of digital design fundamentals, FSMs, CDC, RDC, mixed-signal subsystems, and SoC integration
• Understanding of industry-standard protocols including AMBA, I2C, I3C, SPI, JTAG, and OBI
• Expertise in Verilog, SystemVerilog, UVM and class-based verification methodologies
• Expertise in constrained-random, coverage-driven verification, regression automation, and verification signoff
• Expertise in SystemVerilog Assertions (SVA), formal verification techniques
• Expertise in Python, Perl, and UNIX/Linux shell scripting for automation
• Hands-on experience developing testbenches, drivers, monitors, scoreboards, assertions, and reusable verification IP
• Strong analytical and problem-solving skills
• Experience with industry-standard EDA tools (Synopsys, Cadence)

Nice to have

• Working knowledge of PMIC architectures and power management principles
• Experience with formal verification techniques

Benefits

• Stock option grant
• Comprehensive benefits package including health, dental, vision, and 401(k)

About the company

Powerlattice is a well-funded semiconductor start-up company backed by leading Silicon Valley venture capital firms. They are developing chiplet power delivery technology for high-performance processors.