Taaraconnect

Lead Analog/Mixed-Signal ASIC Design Engineer

Sunnyvale, CA, Remote. Posted 9 days ago

The role

You will lead ASIC tape-out efforts and own the ASIC top-level architecture. You will work on co-integrated electronic and photonic modules for wireless optical communication systems.

What you will do

  • Own and deliver custom ASICs for co-integration with large-scale photonic integrated circuits.
  • Contribute to ASIC design and layout, system-level optimization, and product strategy.
  • Lead ASIC tape-out efforts.
  • Own the ASIC top-level architecture.
  • Drive the delivery and validation of ASIC dies.
  • Make hands-on contributions to Analog/Mixed-Signal (AMS) ASIC designs.
  • Coordinate a small team of ASIC design and layout engineers.

Required qualifications

  • Ph.D. in Electrical Engineering or a related field.
  • 10 or more years of relevant industry experience with demonstrated achievements in analog/mixed-signal circuit design and implementation in modern CMOS technologies.
  • Deep design expertise in high-precision designs: Analog-to-digital and digital-to-analog converters, bandgap references, voltage regulators, amplifiers, and other supporting circuitry.
  • Integration and co-simulation of analog and digital circuits in the context of mixed-signal design and verification.
  • Deep design expertise in high-speed designs: Front-end circuits for optical communication, including modulator drivers and transimpedance amplifiers (TIAs) operating at tens of GHz, and broadband circ
  • Electromagnetic design of high-frequency transmission lines, inductors, and other passive elements.
  • Experience owning top-level ASIC architecture and coordinating engineering teams.
  • Hands-on experience leading multiple ASIC tape-outs at commercial foundries.
  • Hands-on experience with Design Rule Checks (DRC), Layout Versus Schematic (LVS), Power Integrity (PI), and Signal Integrity (SI) verification.

Nice to have

  • Experience with planning and executing verification of large Systems-on-Chip (SoCs) incorporating complex digital logic and large numbers of custom-designed blocks.
  • Experience with hardware description languages, such as Register-Transfer Level (RTL) code, and RTL-to-GDS design flows using industry-standard EDA tools for synthesis, timing analysis, and place-and-
  • Experience with versioning tools such as SOS and Git.
  • Experience with commercial layout verification software (Calibre or equivalent).
  • Excellent communication and presentation skills, with the ability to work effectively with senior external partners.
  • Hands-on experience advancing a product from the prototype phase to the final production stage.

Benefits

  • Relocation assistance can be provided.
  • equity
  • benefits

About the company

Taara is on a mission to connect billions of people who lack abundant and affordable internet by pioneering high-throughput, long-range free-space optical communication (FSOC). It was born at X, Google's Moonshot Factory.

Lead Analog/Mixed-Signal ASIC Design Engineer at Taaraconnect | JobZoey