Tenstorrent

Physical Design Engineer: Die-to-Die Interface (RTL to GDSII)

Santa Clara, California, United States. Posted 8 months ago

The role

This person will drive Die-to-Die physical implementation from RTL to GDSII. They will own the full physical design flow and focus on closing high-speed D2D interfaces for multi-die/chiplet architectures.

What you will do

  • Lead Die-to-Die (D2D) physical implementation and closure.
  • Take high-speed D2D PHYs/controllers from netlist to tapeout.
  • Own the full PD flow including synthesis, floorplanning, P&R, CTS, optimization, and sign-off.
  • Drive timing and verification including full STA, SI analysis, and sign-off quality DRC/LVS.
  • Improve and maintain physical design methodologies, flows, and automation scripts.
  • Partner with full-chip/chiplet teams to meet tapeout requirements.
  • Partner with analog design team to resolve interface issues.
  • Apply EDA tool expertise across Synopsys, Cadence, and Mentor.

Required qualifications

  • 5+ years as an ASIC Physical Design Engineer at advanced nodes (7nm or below).
  • Multiple successful tapeouts.
  • Strong in full-chip implementation across synthesis, floorplanning, place-and-route, CTS, and sign-off.
  • Familiar with high-speed interfaces (D2D, PCIe, HBM, SerDes).
  • Knowledge of timing, signal integrity, and power integrity.
  • Proficiency with STA, constraints, and closure for complex, high-speed designs.
  • Ability to use automation scripts (Tcl, Python).
  • B.S./M.S. in EE/CE or related field.

Benefits

  • highly competitive compensation package
  • benefits

Before you apply

  • Candidates will be assessed for the appropriate level during the interview process.
  • Position requires access to technology that requires a U.S. export license for persons whose most recent country of citizenship or permanent residence is a U.S. EAR Country Groups D:1, E1, or E2 count
  • Offer is contingent upon being eligible to access U.S. export-controlled technology.
  • Offer may be contingent upon citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency.

About the company

Tenstorrent is leading the industry on cutting-edge AI technology. Their team has developed a high performance RISC-V CPU from scratch.

Physical Design Engineer: Die-to-Die Interface (RTL to GDSII) at Tenstorrent | JobZoey