Principal SoC RTL Engineer

The role

The Principal RTL Engineer will own pre-tapeout quality for digital SoC modules on MCU platforms. This role involves driving architecture, microarchitecture, and RTL development for next-generation silicon.

What you will do

• Own and be responsible for pre-tape out quality for digital SOC modules on the MCU
• Explore architecture and develop micro-architecture
• RTL development for IPs and SOCs using Verilog
• 3rd party IP identification, selection, and integration
• Collaboration with verification and FPGA teams in test plan development and debug
• Collaborate with the Physical Design team to close the design on timing and power targets
• Assist in silicon bring-up and validation
• Run tool for quality checks (LINT, CDC, and RDC) and fix/waive the issues

Required qualifications

• Bachelor’s degree in Electronics Engineering, Electrical Engineering, Instrumentation & Control Engineering, or a related field
• 20 years of experience
• Deep and broad knowledge of current and emerging SOC design technologies
• Expert knowledge in designing, implementing, and troubleshooting IPs and SOC
• Demonstrate a deep understanding of customer needs and the competitive landscape
• Ability to estimate the impact of and help plan and lead the implementations and have a positive impact on the entire output
• Can architect and guide programs across the full range of technical areas

About the company

Ambiq is on a mission to enable intelligence everywhere by powering the AI edge revolution with low-power semiconductor solutions. Since 2010, they have shipped over 300 million units to customers building wearables, medical devices, IoT products, and AI-powered edge applications.