Asteralabs

Principal Digital Design Engineer (AI Fabric)

San Jose, CA. Posted 10 months ago

The role

You will architect and implement next-generation digital designs for high-performance connectivity solutions. You will own complex blocks from micro-architecture through silicon bring-up.

What you will do

  • Develop and implement complex digital blocks and subsystems by defining micro-architecture and driving digital design.
  • Collaborate with verification teams to develop test plans, achieve coverage closure, and debug complex issues.
  • Lead efforts to achieve timing closure and implement Design-for-Test (DFT) features.
  • Work closely with post-silicon teams to facilitate silicon bring-up and debug.
  • Mentor junior engineers to develop their technical skills and expertise.
  • Actively contribute to the development and improvement of silicon development processes.
  • Drive designs to production, ensuring accountability for quality, schedule, and overall design success.

Required qualifications

  • Bachelor’s degree in electrical engineering or equivalent.
  • 8+ years of hands-on experience developing complex SoC/silicon products in Server, Storage, and/or Networking markets
  • Architecture definition and micro-architecture development
  • RTL coding, functional simulation, and synthesis
  • Timing closure and gate-level simulation (GLS)
  • Design for test (DFT) implementation
  • Production experience with advanced CMOS nodes (≤7nm)
  • Deep expertise in at least one high-speed protocol—PCIe , Ethernet, Infiniband, DDR, or similar
  • Third-party IP integration and verification.
  • Block-level design ownership from architecture through GDS
  • Proficiency with Cadence and/or Synopsys digital design flows
  • Familiarity with UVM-based verification methodologies.

Nice to have

  • Track record of delivering multiple high-performance designs to production in data-center environments
  • Hands-on collaboration with embedded firmware teams; deep understanding of firmware development challenges and constraints
  • Familiarity with standard embedded processor subsystems (RISC-V, Arm, etc.)
  • Proven contributions to design methodology, CAD automation, or design infrastructure to improve productivity or design quality

About the company

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. The company’s Intelligent Connectivity Platform integrates semiconductor-based technologies with the COSMOS software suite.

Principal Digital Design Engineer (AI Fabric) at Asteralabs | JobZoey