STA Physical Design Engineer, Senior Principal

The role

You will drive the planning, coordination, and execution for the design of connectivity ASICs. This involves RTL to GDS ownership across design stages including Synthesis, PnR, STA, and Signoff.

What you will do

• Drive PnR activities from RTL to GDS for complex SoCs or sub-systems.
• Identify RTL issues early and work with frontend team on resolution.
• Use various custom clocking techniques.
• Work with high-speed designs with serdes/ddr IPs.
• Use PnR tool and signoff flows like Extraction, STA, Formality, EM-IR and DRC/LVS.
• Use ECO flow with PT DMSA and hyperscale models for bigger chips.
• Interact with design team on SDC constraints refinement.
• Work with top level owners on defining and managing I/O timing budgets across hierarchical designs.
• Build hierarchical designs using black-box model, ETM or abstract model.
• Partner with design, implementation, and verification teams to drive block/top convergence.

Required qualifications

• Bachelor’s in Electrical Engineering or Computer Science
• ≥10 years of experience in PnR and sign-off for complex SoCs in Server, Storage, or Networking applications
• Expertise in PnR, Extraction, Timing closure, EM-IR, Formality and DRC/LVS at both block and full-chip level
• Strong knowledge of synthesis, place-and-route, extraction, and equivalence checking flows in advanced nodes (7nm or below)
• Proficiency with Cadence and/or Synopsys physical design/STA toolchains
• Strong scripting ability (Tcl, Python, Perl)
• Ability to work independently with strong prioritization and a professional, customer-focused mindset

Nice to have

• Master’s degree
• Familiarity with high-speed SERDES and Ethernet PHY timing challenges
• Knowledge of ECO methodologies, DFT tools, and test coverage analysis
• Experience working with IP vendors for both RTL and hard-macro integration
• SystemVerilog/Verilog familiarity

About the company

Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions. The company's Intelligent Connectivity Platform integrates semiconductor-based technologies with the COSMOS software suite.