Asteralabs
Hardware Design Engineering, Senior Director - Signal Connectivity Rack-Scale Platforms
San Jose, California, United States. Posted 5 months ago
The role
The Senior Director, Hardware Design Engineering will lead and scale the hardware design engineering organization. This role involves overseeing electrical/PCB design, mechanical engineering, hardware validation, lab infrastructure, and customer hardware engineering support for connectivity products.
What you will do
- Lead and scale the hardware design engineering organization
- Manage electrical/PCB hardware design, mechanical engineering, and hardware validation
- Oversee lab engineering and infrastructure
- Provide customer hardware engineering and OEM enablement
- Build, mentor, and lead a team of engineering managers and senior individual contributors
- Define and manage the hardware technology roadmap
- Drive R&D and new product development for AEC, SCM, Silicon Evaluation Platforms, and rack-scale products
- Oversee products through the full design lifecycle from architecture to production release
- Direct mechanical engineering including connector design, thermal management, and chassis architecture
- Own the hardware validation strategy and execution
Required qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical discipline
- 18+ years of progressive experience in hardware design engineering for high-speed interconnect, transceiver/module, cable assembly, evaluation platforms, or rack-scale system products
- 8+ years in engineering management/leadership roles, including managing managers and building multi-team organizations
- Proven track record leading engineering teams through full product development lifecycle
- Deep technical expertise in high-speed PCB/substrate design, signal integrity, power delivery, and mixed-signal circuit design at 56G/112G PAM4 data rates or above
- Strong background in mechanical engineering for interconnect and system products
- Demonstrated experience establishing and executing hardware validation and qualification programs
- Experience building and managing hardware engineering lab infrastructure and measurement capabilities
- Proven experience engaging with OEM customers on hardware design enablement
- Proven ability to make strategic technology decisions and detailed technical trade-offs
- Experience managing engineering teams through hyper-growth
- Strong executive communication skills
Nice to have
- Master's or Ph.D. in Electrical Engineering with emphasis on high-speed interconnects, electromagnetic design, or mixed-signal systems
- Direct experience developing Active Electrical Cables (AEC), Smart Cable Modules (SCM), optical transceivers, or high-speed cable/connector assemblies
- Experience designing silicon evaluation platforms (EVBs/SVBs) for complex SoCs, ASICs, or connectivity silicon
- Experience developing rack-scale or chassis-class hardware products for data center, hyperscale, or AI infrastructure applications
- Track record of successful OEM design enablement
- Experience building and scaling customer-facing hardware engineering support organizations
- Experience with 224G/lane (1.6T aggregate) interconnect technology and next-generation substrate/connector/cable architectures
- Track record delivering connectivity products to hyperscale customers (AWS, Google, Microsoft, Meta, NVIDIA, or equivalent)
- Experience integrating retimer ASICs into cable module or system-level products
- Deep familiarity with relevant standards: IEEE 802.3ck/dj, OIF CEI-112G/224G, SFF-8636, CMIS 5.x+, OSFP, QSFP-DD, OCP specifications
Benefits
- discretionary bonus
- incentives
- benefits
About the company
Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions. The company is the connectivity backbone of rack-scale AI infrastructure.