SoC Design Director

The role

This person will lead a team of engineers responsible for the design and development of next-generation System-on-Chip (SoC) solutions. They will own SoC subsystems from specification through RTL implementation and manage project execution and team performance.

What you will do

• Own the design and development of SoC subsystems from specification through RTL implementation.
• Review architecture and microarchitecture specifications and translate them into efficient design solutions.
• Oversee RTL coding, integration, and design reviews.
• Drive design closure while meeting performance, power, area, and schedule targets.
• Define project plans, resource allocation, and execution timelines.
• Track deliverables and ensure milestones are met on schedule.
• Identify technical and program risks and implement mitigation plans.
• Provide regular status updates to leadership and key stakeholders.
• Work closely with Architecture, Verification, DFT, Physical Design, Firmware, and Software teams.
• Lead, mentor, and manage a team of SoC/RTL design engineers.

Required qualifications

• Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.
• 15+ years of experience in ASIC/SoC design and development.
• 5+ years of experience leading engineering teams or technical projects.
• Strong expertise in RTL design using Verilog/SystemVerilog.
• Experience with SoC integration, interconnects, memory subsystems, and industry-standard protocols such as AXI, AHB, APB, PCIe, USB UALink , Ethernet, or DDR.
• Strong understanding of the complete ASIC development lifecycle.
• Experience working with Verification, Physical Design, DFT, and Post-Silicon Validation teams.
• Excellent debugging, problem-solving, and communication skills.
• Experience with AI/ML, networking, datacenter, automotive, or high-performance computing SoCs.
• Knowledge of low-power design techniques and clock/reset architectures.
• Experience with scripting languages such as Python, Perl, or Tcl.
• Prior experience delivering multiple successful tape-outs.

Nice to have

• Exposure to chiplets is desirable.
• Experience of working on PCIE, UCIE, UALink, Ethernet products is highly desirable.

About the company

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. The company's Intelligent Connectivity Platform integrates semiconductor-based technologies with the COSMOS software suite.