Asteralabs
Principal Hardware Applications Engineer – PCIe Switches (Scorpio)
Vancouver, British Columbia, Canada. Posted 2 months ago
The role
You will lead customer system design-in and Scorpio-related debug. You will guide hyperscalers and AI system builders from evaluation through production deployment using Scorpio Smart Fabric Switches.
What you will do
- Lead technical engagements with hyperscalers, ODMs, and AI system partners.
- Own on-site and remote bring-up, debug, and performance tuning of Scorpio-based platforms at customer sites.
- Translate customer requirements into actionable feedback for product, silicon, and firmware teams.
- Influence post-silicon validation plans and execute system-level integration on next-generation switching platforms.
- Debug complex multi-domain issues spanning protocol, signal integrity, firmware, and software stacks.
- Partner with hardware, firmware, and SI/PI teams to root-cause issues.
- Serve as the go-to Scorpio applications expert across sales, marketing, product, and engineering.
- Mentor junior applications engineers.
- Represent Astera Labs at industry forums, standards bodies, and customer executive reviews.
- Author white papers, technical collateral, and training materials.
Required qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
- 8+ years of experience in product applications, systems engineering, or post-silicon validation on high-speed connectivity or networking silicon
- Strong understanding of the physical layer and high-speed serial interfaces (PCIe, Ethernet, UALink, UCIe, or similar)
- Hands-on experience with lab bring-up, debug, and system-level integration including scopes, BERTs, and protocol analyzers
- Proven track record engaging directly with hyperscaler, cloud, or Tier-1 OEM/ODM customers on complex technical deployments
- Excellent communication skills
Nice to have
- MS or PhD in Electrical Engineering, Computer Engineering, or a related field
- Direct experience with PCIe Gen 6 / Gen 7, UALink, or UCIe protocols and compliance testing
- Familiarity with AI/ML rack-scale architectures, GPU fabrics, and accelerator interconnects
- Scripting and automation experience (Python, shell) for validation and diagnostics
- Background contributing to standards bodies (PCI-SIG, UALink Consortium, UCIe) or authoring technical publications
Benefits
- Discretionary bonuses
- Incentives
- Benefits
About the company
Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions. The company's Intelligent Connectivity Platform integrates semiconductor-based technologies with the COSMOS software suite.