Asteralabs

Principal/ Sr.Principal Digital Design Engineer

San Jose, California, United States. Posted a month ago

The role

The Principal Digital Design Engineer will architect and implement next-generation digital designs for high-performance AI connectivity solutions. This role involves owning complex blocks from micro-architecture through silicon bring-up and driving RTL implementation.

What you will do

  • Develop and implement complex digital blocks and subsystems by defining micro-architecture and driving RTL implementation
  • Lead efforts to achieve timing closure and implement Design-for-Test (DFT) features
  • Drive designs to production, ensuring accountability for quality, schedule, and overall design success
  • Collaborate with verification teams to develop test plans, achieve coverage closure, and debug complex issues
  • Own third-party IP integration and block-level verification through sign-off
  • Work closely with post-silicon teams to facilitate silicon bring-up and debug
  • Mentor junior engineers to develop their technical skills and expertise
  • Contribute to the development and improvement of silicon development processes
  • Drive design methodology improvements and CAD automation initiatives

Required qualifications

  • Bachelor's degree in Electrical Engineering or equivalent
  • 10+ years of hands-on experience developing complex SoC/silicon products in Server, Storage, and/or Networking markets
  • Expertise in architecture definition, micro-architecture development, RTL coding, functional simulation, and synthesis
  • Strong understanding of timing closure, gate-level simulation (GLS), and DFT implementation
  • Deep expertise in at least one high-speed protocol: PCIe, CXL, Ethernet, DDR, or similar
  • Production experience with advanced CMOS nodes (≤7nm)
  • Proficiency with Cadence and/or Synopsys digital design flows

Nice to have

  • Master's degree in Electrical Engineering or related field
  • Track record of delivering multiple high-performance designs to production in data-center environments
  • Hands-on collaboration with embedded firmware teams; understanding of firmware development challenges
  • Familiarity with standard embedded processor subsystems (RISC-V, Arm, etc.)
  • Proven contributions to design methodology, CAD automation, or design infrastructure

Benefits

  • discretionary bonus
  • incentives
  • benefits

About the company

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. The company's Intelligent Connectivity Platform integrates semiconductor-based technologies with the COSMOS software suite.

Principal/ Sr.Principal Digital Design Engineer at Asteralabs | JobZoey