Asteralabs
Principal Product Applications Engineer – Scorpio
San Jose, California, United States. Posted a month ago
The role
You will help customers and internal teams deploy high-performance PCIe fabric solutions for rack-scale AI infrastructure. You will translate system requirements into architectures and lead platform bring-up for Scorpio switches.
What you will do
- Lead technical engagements with customers and ecosystem partners to define Scorpio-based PCIe Firmware architectures and deployment requirements.
- Develop reference designs, application guidance, technical presentations, and system-level collateral.
- Translate customer use cases into Scorpio Firmware requirements, integration plans, and prioritized technical actions.
- Drive system bring-up, debug, and interoperability across PCIe hosts, BMCs, GPUs, NICs, storage devices, and other high-performance endpoints.
- Partner with firmware teams to define, implement, and validate device configuration, traffic routing, boot flows, telemetry, recovery mechanisms, and field-debug capabilities.
- Analyze link training, enumeration, performance, error handling, data traffic and system stability issues using protocol traces, logs, and lab instrumentation.
- Build and maintain firmware, validation, and automation workflows.
- Partner with firmware, architecture, design, validation, and FAE teams to resolve complex issues from prototype through mass production.
- Lead root-cause analysis, communicate risks and recommendations, and drive issues to closure.
- Influence customer decisions on product enhancements and ecosystem interoperability plans.
Required qualifications
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
- 8–12 years of experience in product applications, firmware development, systems engineering, platform validation, or a related semiconductor domain.
- Strong understanding of PCIe Switch Firmware, PCIe architecture (including link training, enumeration, configuration space, error handling, performance, and system interoperability).
- Experience with firmware development or debug, including the ability to read code, interpret logs, and collaborate effectively with firmware developers.
- Hands-on experience with system bring-up, lab debug, protocol analysis, and root-cause investigation across complex hardware and software stacks.
- Strong written and verbal communication skills.
Nice to have
- Experience with PCIe Gen 5, Gen 6 or Gen 7, PCIe fabric switches, retimers, or other high-speed connectivity products.
- Familiarity with UALink, UCIe, or emerging scale-up and scale-out interconnect architectures is a plus.
- Experience developing validation plans, firmware test strategies, lab automation, or customer-facing technical collateral.
- Background supporting AI servers, accelerator platforms, hyperscale infrastructure, or high-performance computing systems.
- Demonstrated ability to lead ambiguous, cross-functional technical challenges in a fast-paced, high-growth environment.
Benefits
- discretionary bonus
- incentives
- benefits
About the company
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. The company’s Intelligent Connectivity Platform integrates semiconductor-based technologies with the COSMOS software suite.