Physical Design Engineering Director

The role

You will lead a team of physical design engineers to implement connectivity ASICs. You will own physical design execution from RTL to GDSII and drive floorplanning, place-and-route, timing closure, and sign-off.

What you will do

• Build, lead, and mentor a physical design team
• Drive block and top-level physical design implementation from floorplan through tapeout
• Collaborate with RTL, DFT, STA, EMIR, and verification teams
• Work with IP vendors for RTL and hard-macro integration
• Drive team execution, hiring, career development, and sprint planning
• Establish physical design best practices, flow improvements, and quality checks
• Coordinate with global PD teams in San Jose, Irvine, and Bangalore

Required qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
• 15+ years of experience in physical design implementation of complex SoCs at advanced nodes (7nm and below)
• 5+ years of experience leading teams or projects
• Hands-on expertise across the physical design flow: synthesis, place-and-route, CTS, extraction, timing closure, EM-IR, DRC/LVS, and equivalence checking
• Proficiency with Cadence Innovus and/or Synopsys Fusion Compiler/ICC2 and supporting toolchains
• Strong scripting ability in Tcl, Python, and/or Perl
• Professional attitude with the ability to prioritize a dynamic list of tasks, plan and prepare for customer meetings in advance, and work with minimal guidance
• Entrepreneurial, open-minded behavior and can-do attitude

Nice to have

• Master's degree
• Deep understanding of high-speed SerDes physical layer, including equalization, CDR, and signal integrity considerations impacting physical design
• Knowledge of physical layer timing challenges specific to high-speed serial interfaces
• Track record of building and scaling physical design teams through multiple tapeouts
• Knowledge of agentic AI solutions for EDA automation

Benefits

• discretionary bonus
• incentives
• benefits

About the company

Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions. The company's Intelligent Connectivity Platform integrates semiconductor-based technologies with the COSMOS software suite.