Manager/Director of Hardware Engineering

The role

You will lead a team of 8-12 RTL Microarchitects and Design Verification Engineers. You will own the end-to-end execution of high-speed interconnect IP blocks.

What you will do

• Directly manage, mentor, and grow a team of 8-12 RTL and DV engineers.
• Drive the development of high-speed interconnect IP from microarchitecture specifications to RTL implementation and tape-out.
• Oversee the development of robust, coverage-driven verification test plans, UVM/OVM environments, and emulation platforms.
• Work closely with architecture, physical design, and system teams to balance power, performance, area (PPA), and timing requirements.
• Define and establish engineering metrics, standard methodologies, and agile project management tools to meet strict tape-out milestones.

Required qualifications

• B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
• 8+ years of industry experience in ASIC/IP development.
• At least 2-3 years in a technical leadership or management role.
• Strong background in high-speed protocols (e.g., PCIe, UCIe, CXL, Ethernet, or advanced SerDes).
• Proficiency in SystemVerilog, Verilog, and industry-standard EDA simulation/synthesis flows.
• Deep understanding of modern verification methodologies (UVM/OVM), constrained random testing, formal verification, and coverage analysis.
• Highly adaptable, proactive problem-solver with a proven track record of delivering results in a dynamic, fast-moving environment.

Benefits

• Comprehensive medical, dental, and vision benefits
• 401(k) retirement plan
• Equity

About the company

Baya Systems is a fast-moving Series B startup that focuses on software-driven, unified fabric solutions for single-die and multi-die systems. They design and license disruptive intellectual property for use in semiconductor chips.