DV Formal Verification

The role

You will own block- and SOC-level formal verification, debug, and proof convergence for AI accelerator silicon. You will use and develop AI-assisted tool flows to accelerate convergence on complex designs.

What you will do

• Own block- and SOC-level formal verification, debug, and proof convergence for AI accelerator silicon
• Use and develop AI-assisted tool flows including AI agents for proof guidance

Required qualifications

• Master's plus 8 years of experience in block- and full-chip formal verification on complex SOCs
• Exceptional abilities in formal verification: property authoring (SVA / PSL), proof strategies, and tool-flow ownership
• Demonstrated ability to debug proof failures and drive convergence in collaboration with RTL designers and architects
• Hands-on with industry-standard formal tools (Synopsys VC Formal, Cadence Jasper, or equivalent)

Nice to have

• Security verification
• Processor verification
• Equivalence checking
• AMS / IP-flow exposure

Benefits

• equity grant per company guidelines
• medical / dental / vision
• 401(k)
• standard PTO

Before you apply

• Work authorization is required at start
• DensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas
• Aspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR)

About the company

DensityAI is an Equal Opportunity Employer.