Densityai
Physical Design Timing Engineer
Mountain View, CA. Posted 5 months ago
About the job
About the role Own Full chip and Block timing methodologies and execution to-signoff of our AI accelerator silicon. Work with chip-design and software teams driving DensityAI's AI accelerator program from first silicon through scale-out. What you'll do - Own Full chip and Block timing methodologies and execution to-signoff of our AI accelerator silicon. - Use and develop AI-assisted tool flows to accelerate physical design timing convergence and signoff timelines. What we're looking for - Exceptional abilities across the full physical design flow (synthesis, place & route, CTS, signoff) with emphasis on timing flows and methodologies - 10+ years of experience on very high performance designs…
Read the full posting on Densityai’s site