Staff Engineer: STA Methodology & Sign-off Lead

The role

The Staff Engineer will architect and lead SOC Static Timing Analysis (STA) Methodology. This role involves defining sign-off architecture, timing convergence strategies, and building automation flows to enable execution.

What you will do

• Define and own full-chip SOC timing sign-off criteria.
• Architect, deploy, and maintain advanced STA and ECO flows.
• Develop methodologies to identify structural timing issues and predict physical design bottlenecks.
• Evaluate, qualify, and deploy new EDA tool features.
• Architect scalable automation utilities using Tcl, Python, or Perl.
• Partner with Physical Design to define CTS methodologies and floorplanning guidelines.
• Guide DFT and RTL teams on methodology to resolve structural bottlenecks.

Required qualifications

• 8 to 11 years of hands-on experience in VLSI design.
• Primary focus on STA Methodology, flow development, and sign-off criteria at advanced process nodes (7nm, 5nm, or below).
• Deep expertise in building flows around industry-standard sign-off tools.
• Mastery of Multi-Mode Multi-Corner (MMMC) flow architecture, Hierarchical (ILM/ETM) vs. Flat timing strategies, and constraint (SDC) validation methodologies.
• Strong understanding of advanced node timing phenomena, including waveform propagation, crosstalk, and statistical margining (LVF/POCV).
• Proven ability to architect broad flow solutions and debug systemic tool or methodology bottlenecks.
• Strong leadership presence to define technical standards and influence cross-functional teams.
• B.Tech/M.Tech in Electrical/Electronics Engineering or a related field.

Nice to have

• Strong emphasis on Cadence Tempus

About the company

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. Launched in 2022, it is led by veteran technologists with backgrounds in semiconductor design and AI systems.