Principal ASIC Design Verification Engineer

The role

This person will verify the functionality, performance and robustness of custom silicon designs. They will build test benches, lead verification plans and support silicon bring-up. The role is hands-on, with high ownership and the chance to shape first-generation silicon.

What you will do

• Develop and execute verification plans for block, subsystem and full-chip environments.
• Build SystemVerilog/UVM test benches, including agents, monitors, scoreboards and coverage models.
• Write SystemVerilog Assertions and integrate formal verification where appropriate.
• Drive constrained-random and directed testing to validate functionality and corner cases.
• Run simulations, triage failures and drive root-cause analysis with RTL designers.
• Implement and maintain coverage and drive coverage closure for sign-off.
• Manage regression testing, simulation farms and CI pipelines.
• Support silicon bring-up and post-silicon validation.
• Participate in ASIC team interviews.
• Manage external IP providers and verification partners when needed.

Required qualifications

• B.S. or M.S. in Electrical Engineering, Computer Engineering or a related field.
• 10+ years of experience in ASIC/SoC verification.
• Solid understanding of SystemVerilog, digital logic, RTL design, DFT and hardware design and verification flows.
• Proficiency with simulation tools (VCS, Xcelium, Questa), waveform debug (Verdi, SimVision) and coverage tools.
• Scripting in Python, Perl or TCL.
• Experience with test planning, UVM-based testbench development, constrained-random testing and SystemVerilog assertions.
• Experience with regression management, revision control (Git), CI/CD automation and gate-level simulation.
• Experience developing and integrating reference models.
• Experience with embedded processor-based designs and firmware or bare metal coding in C or C++.
• Understanding of industry-standard interfaces such as APB, AHB and AXI.
• Involvement in post-silicon validation planning and execution.
• Must be a U.S. person under 22 C.F.R. § 120.15 or eligible for a federally issued export control license.

Nice to have

• Experience with low power verification.
• Experience with analog behavioral models.
• Familiarity with physical design flows.
• Experience working in cross-functional, geographically distributed teams.
• Experience in space, telecom or RF/digital mixed systems.

Benefits

• Paid time off.
• Medical, dental and vision coverage.
• Life insurance.
• Paid parental leave.
• Many other perks.

Before you apply

• Must be a U.S. person as defined by ITAR (U.S. citizen, lawful permanent resident or certain protected individual), or otherwise eligible for a federally issued export control license.
• Non-traditional career paths are encouraged; the posting says candidates need not meet 100% of the preferred skills and experience.

About the company

K2 Space is building the largest and highest-power satellites ever flown. The company is a high-growth, Series D-funded business with over $1 billion in signed contracts.