Principal ASIC Package Design Engineer

The role

You will own ASIC package architecture for FC-BGA and MCM solutions, from early architecture and trade studies through vendor engagement, qualification and production ramp. You will act as the technical authority for package design and work with silicon, RF and systems teams.

What you will do

• Own ASIC package architecture for FC-BGA and MCM solutions, including substrate stack-up, ball-map strategy, power delivery and signal breakout.
• Lead package-level trade studies across cost, performance, power integrity, signal integrity, thermal, manufacturability and reliability.
• Define the long-term packaging roadmap aligned with future ASIC nodes and multi-die integration.
• Establish organizational package design standards, methodologies and best practices.
• Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes and dense power grids.
• Own package-level SI/PI strategy, including high-speed interfaces and power delivery network design.
• Lead package thermal architecture, including lid selection, thermal interface materials and heat-spreaders.
• Manage relationships with packaging vendors, substrate suppliers and OSATs, including qualification and contract negotiation.
• Drive material selection, substrate technology choices and assembly process optimization.

Required qualifications

• Bachelor's degree in Packaging Engineering, Mechanical Engineering, Electrical Engineering or a related field.
• 10+ years of experience in ASIC package design, with deep expertise in FC-BGA.
• Proven experience delivering high-pin-count, high-performance ASIC packages into production.
• Strong understanding of substrate technologies and materials, package-level SI/PI fundamentals and thermal management for power-dense ASICs.
• Fluent in SI/PI and EM simulation tools such as SIWave, HFSS and ADS.
• Experience working directly with OSATs and substrate vendors.
• Knowledge of packaging qualification and test methodologies.

Nice to have

• Experience with MCM or heterogeneous integration (chiplets, interposers, advanced laminates).
• Background in high-speed digital or mixed-signal SoCs.
• Familiarity with aerospace, space or high-reliability electronics.
• Experience defining packaging strategy from early architecture through first silicon and volume ramp.
• Demonstrated history of building or scaling package design methodology within an organization.

Benefits

• Paid time off.
• Medical, dental and vision coverage.
• Life insurance.
• Paid parental leave.
• Equity in the company.
• Many other perks.

Before you apply

• Must be a U.S. Person as defined by 22 C.F.R. § 120.15, or otherwise eligible for a federally issued export control license, because the role involves ITAR-controlled information and items.
• Applicants who do not meet 100% of the preferred skills and experience are encouraged to apply.

About the company

K2 Space is building the largest and highest-power satellites ever flown, with over $1 billion in total funding and over $1 billion in signed contracts. The company is a Series D-funded business that plans multiple launches in 2027 and scaling to 100 satellites a year.