Senior ASIC Design Verification Engineer

The role

You will verify the functionality, performance and robustness of custom silicon designs. You will build SystemVerilog and UVM test benches, drive verification plans and coverage closure, and support silicon bring-up.

What you will do

• Develop and execute verification plans for block, subsystem and full-chip environments
• Build SystemVerilog/UVM test benches with agents, monitors, scoreboards, checkers and coverage models
• Write SystemVerilog Assertions and integrate formal verification where appropriate
• Drive constrained-random and directed testing for functionality, corner cases and stress
• Run simulations, triage failures and drive root-cause analysis with RTL designers
• Implement and maintain functional, code and assertion coverage to sign-off
• Manage regression testing, simulation farms and CI pipelines
• Take part in design reviews and influence design-for-verification practices
• Support silicon bring-up and post-silicon validation
• Take part in ASIC team interviews

Required qualifications

• B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field
• 5+ years of experience in ASIC/SoC verification
• Solid understanding of SystemVerilog, digital logic, RTL design and hardware verification flows
• Proficiency with simulation (VCS, Xcelium, Questa), waveform debug (Verdi, SimVision), coverage tools and scripting (Python, Perl, TCL)
• Experience with test planning, UVM testbench development, constrained-random testing, functional coverage and SystemVerilog assertions
• Experience with regression management, coverage analysis, Git and CI/CD automation
• Understanding of industry-standard interfaces (APB/AHB/AXI)
• Familiarity with embedded processor-based designs and firmware/bare metal coding (C, C++)

Nice to have

• Experience developing and integrating reference models
• Understanding of low power verification
• Familiarity with gate-level simulation and analog behavioral models
• Involvement in post-silicon validation planning and execution
• Experience in cross-functional, geographically distributed teams
• Experience in space, telecom, or RF/digital mixed systems

Benefits

• Paid time off
• Medical, dental and vision coverage
• Life insurance
• Paid parental leave
• Many other perks

Before you apply

• Must be a U.S. person as defined by 22 C.F.R. § 120.15, or otherwise eligible for a federally issued export control license (ITAR)
• Hiring is based on merit, competence and qualifications
• Candidates who do not meet 100% of the preferred skills are encouraged to apply

About the company

K2 Space is building the largest and highest-power satellites ever flown. The company is Series D-funded and has over $1 billion in signed contracts with commercial and US government customers.