Senior ASIC Package Design Engineer

The role

You will define ASIC package architecture for FC-BGA and MCM solutions, from early trade studies through vendor engagement, qualification and production ramp. You will lead package design standards and work with silicon, RF and systems teams on high-speed, power-dense ASICs.

What you will do

• Define ASIC package architecture for FC-BGA and MCM solutions, including substrate stack-up, ball map, power delivery and signal breakout.
• Lead package-level trade studies across cost, performance, power integrity, signal integrity, thermal, manufacturability and reliability.
• Establish package design standards, methodologies and best practices.
• Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes and dense power grids.
• Define and review substrate stack-ups, via strategies, impedance control and escape routing.
• Partner with silicon, RF and systems teams to co-optimize die floorplans and package interfaces.
• Support package-level SI/PI strategy, including PDN design and decoupling.
• Lead package-level thermal architecture, including lid selection, TIMs, heat spreaders and cooling interfaces.
• Manage relationships with external packaging vendors, substrate suppliers and OSATs.
• Drive material selection, substrate technology choices and assembly process optimization.

Required qualifications

• Bachelor's degree in Packaging Engineering, Mechanical Engineering, Electrical Engineering or a related field.
• 5+ years of experience in ASIC package design, with deep expertise in FC-BGA.
• Proven experience delivering high-pin-count, high-performance ASIC packages into production.
• Strong understanding of substrate technologies and materials, package-level SI/PI fundamentals and thermal management for power-dense ASICs.
• Fluent in SI/PI and EM simulation tools such as SIWave, HFSS and ADS.
• Experience working directly with OSATs and substrate vendors.
• Knowledge of packaging qualification and test methodologies.

Nice to have

• Experience with MCM or heterogeneous integration (chiplets, interposers, advanced laminates).
• Background in high-speed digital or mixed-signal SoCs.
• Familiarity with aerospace, space or high-reliability electronics.

Benefits

• Equity in the company
• Paid time off
• Medical, dental and vision coverage
• Life insurance
• Paid parental leave
• Many other perks

Before you apply

• You must be a U.S. person as defined by 22 C.F.R. § 120.15 (U.S. citizen, lawful permanent resident or certain protected individual), or otherwise eligible for a federally issued export control licens

About the company

K2 Space is building the largest and highest-power satellites ever flown, with over $1 billion in total funding and over $1 billion in signed contracts. The company is a high-growth Series D-funded business that plans multiple launches in 2027 and scaling to 100 satellites a year.