Neuralink
Analog IC Design and Verification Engineer
Austin - ATX1; Austin, Texas, United States; South San Francisco, California, United States. Posted 16 months ago
The role
The engineer will perform analog and mixed-signal chip design from circuit design to layout and verification. This includes designing analog circuit building blocks and subsystems to meet noise, power, and cost requirements.
What you will do
- Design analog circuit building blocks and subsystems in transistor-level
- Works with layout teams to oversee block-level layout of multiple blocks
- Planning and execution of analog verification plan for portion of IP or chip
- Runs complex simulations and analyses on designs
- Designs, programs, and runs complex tests
- Reviews tests of junior team members
- Consults with internal or external users and third-party vendors
Required qualifications
- Bachelor of Science degree
- At least 5 years of experience in a related technical field after receiving the BS degree
- Minimum 5 years of experience in analog/mixed-signal integrated CMOS circuit design for a specific area (e.g., delta-sigma ADC, SAR ADC, DAC, VCO, PLL, DLL, Audio CODEC and Class D audio amplifier, hi
- Successful track record of silicon validation
Nice to have
- Masters or PhD in electrical engineering, physics, or other related fields
- Experience with design for high-volume production
- Experience in lab testing of high-precision analog and mixed-signal ICs
- Functional modeling experience and logic verification with Verilog AMS and SystemVerilog
- Experience in design and layout with advanced CMOS FinFET technologies
- Skills in scripting and automation for complex simulation scenarios
Benefits
- Medical, dental, and vision insurance through a PPO plan
- Paid holidays
- Commuter benefits
- Meals provided
- Equity (RSUs)
- 401(k) plan
- Parental leave
- Flexible time off
About the company
Neuralink is creating devices that enable a bi-directional interface with the brain to restore movement to the paralyzed and restore sight to the blind.