Sambanovasystems

Design Verification Engineer, New Grad

San Jose, California, United States. Posted 18 days ago

The role

You will write testbenches, tests, checkers, and coverage in SystemVerilog and UVM for RDU features. You will run regressions, debug simulation failures, and work with RTL designers to find and fix bugs before tape-out.

What you will do

  • Write and execute verification plans for chip-level control and initialization features
  • Build SystemVerilog and UVM testbench components, including sequences, checkers, assertions, and functional coverage
  • Write directed and constrained-random tests to find corner cases
  • Debug simulation and regression failures with RTL designers
  • Analyze functional and code coverage and close coverage gaps

Required qualifications

  • B.S. in Electrical Engineering, Computer Engineering, Computer Science, or related field
  • Coursework or project experience in digital design and computer architecture
  • Experience with SystemVerilog or Verilog
  • Scripting experience in Python, Perl, TCL, or shell
  • Experience with UVM
  • Familiarity with constrained-random verification, functional coverage, and assertions
  • Familiarity with clock domain crossing concepts

Nice to have

  • M.S. in Electrical Engineering, Computer Engineering, Computer Science, or related field
  • Experience using AI tools such as Claude for verification development and debug
  • Internship experience in design verification

Benefits

  • Base salary plus equity
  • 95% premium coverage for employee medical insurance
  • 77% premium coverage for dependents
  • Health Savings Account (HSA) with employer contribution
  • Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life, and AD&D insurance plans
  • Flexible Spending Account (FSA) options like Health Care, Limited Purpose, and Dependent Care
  • Headspace subscription
  • Gympass+ membership
  • One Medical membership
  • Counseling services with an Employee Assistance Program

Before you apply

  • You must submit an application form for each position for which you believe you are qualified

About the company

SambaNova is a leader in next-generation AI infrastructure, delivering a full-stack inference platform for customers worldwide. Its core technology is the RDU (Reconfigurable Dataflow Unit).

Design Verification Engineer, New Grad at Sambanovasystems | JobZoey