Sambanovasystems

Senior/Lead VLS Engineer - Global Circuits

San Jose, California, United States. Posted 9 days ago

The role

The Senior/Lead VLSI Design Engineer will architect and design custom clock distribution networks and power distribution integrity. This role involves performing signal and power integrity analyses and partnering with IP teams for SoC integration.

What you will do

  • Architect, design, and perform transistor level circuit design and optimization of custom ultra-low-jitter, low-skew chip-level clock distribution networks
  • Perform comprehensive signal integrity, power integrity, jitter, skew, and EM/IR analyses
  • Involved in low-power design methodology and power analysis of key components
  • Power distribution integrity analysis
  • Collaborate closely with Physical Design teams on floor-planning, custom routing, shielding strategies, and Clock Tree Synthesis guidelines
  • Partner with IP teams to select, evaluate, and integrate custom IO pads, level translators, primary/secondary ESD clamps, and rail protection structures
  • Drive pre-silicon chip-level reliability and clock timing sign-off before tape-out
  • Support post silicon bring-up

Required qualifications

  • Bachelor’s or Master’s degree in Electrical Engineering or Microelectronics
  • 8+ years of custom analog/mixed-signal VLSI design experience in advanced process nodes (FinFET / GAA, e.g., 7nm, 5nm, 3nm, 2nm)
  • Experience designing custom clock networks, low-power design techniques, and custom IO/ESD/Latch-Up circuits
  • Deep knowledge of physical layout requirements for high-speed clocking, parasitic extraction, and low-resistance interconnects
  • Strong cross-functional collaboration and technical communication skills
  • Experience with Transistor-level circuit simulators, Transmission Line Theory, Jitter and Skew analysis/methodology, PERC, ESD, EM/IR analysis, and parasitic extraction tools
  • Deep familiarity with leading semiconductor foundry ESD and Latch-Up design rules, guard-ring guidelines, and sign-off flows across advanced nodes

Nice to have

  • MS/Ph.D. in Electrical Engineering with experience on custom Analog/Mixed-Signal IC Design or silicon reliability
  • 10+ years of industry experience with a track record of driving complex top-level silicon integrations
  • Experience leveraging modern AI tools and AI-assisted workflows to write scripts (e.g., Python, TCL, SKILL) for flow automation, productivity enhancement, and simulation post-processing

Benefits

  • Base salary plus equity
  • 95% premium coverage for employee medical insurance
  • 77% premium coverage for dependents
  • Health Savings Account (HSA) with employer contribution
  • Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life, and AD&D insurance plans
  • Flexible Spending Account (FSA) options like Health Care, Limited Purpose, and Dependent Care
  • Headspace subscription
  • Gympass+ membership
  • One Medical membership
  • Counseling services with an Employee Assistance Program

Before you apply

  • You must submit an application form for each position for which you believe you are qualified

About the company

SambaNova is a leader in next-generation AI infrastructure, delivering a full-stack inference platform for customers worldwide. Its core technology is the RDU (Reconfigurable Dataflow Unit).

Senior/Lead VLS Engineer - Global Circuits at Sambanovasystems | JobZoey