Senior Physical Design Engineer

The role

You will own the physical implementation of memory-centric computing IP and SoC partitions from RTL netlist to GDSII. This includes synthesis, floorplanning, placement, clock tree synthesis, and routing. You will also drive PPA convergence and timing closure.

What you will do

• Own the physical implementation of memory-centric computing IP and SoC partitions from RTL netlist to GDSII
• Drive block- and full-chip-level PPA convergence and timing closure
• Develop floorplans, power delivery networks, and macro placement strategies
• Perform static timing analysis, constraint development, and signoff
• Execute physical verification and signoff
• Collaborate with RTL and verification engineers
• Make design decisions across performance, power, thermal, and cost
• Develop and automate physical implementation flows and methodologies using Tcl/Python scripting and agentic AI tools
• Communicate with stakeholders to ensure designs are delivered on time and within budget
• Complete other responsibilities as assigned

Required qualifications

• Bachelor’s with 5+ years, or Master’s with 3+ years, or PhD's with 0+ years of industry experience
• Strong background in digital physical design and VLSI implementation
• 5+ years of experience in physical design implementation for complex ASIC/SoC designs
• Proficiency with industry-standard EDA tools such as Synopsys Fusion Compiler/ICC2, Cadence Innovus, PrimeTime, and StarRC
• Experience with static timing analysis and constraint (SDC) development
• Experience with low-power design (UPF/CPF)
• Experience with power, IR-drop, and electromigration analysis
• Experience with physical verification (DRC, LVS, antenna) and tapeout on advanced FinFET process nodes
• Experience implementing memory controllers, NoC, or high-speed interconnect IP and full-chip SoC integration
• Proficiency in scripting (Tcl, Python, or Perl)
• Experience in AI/ML workloads
• Strong analytical and problem-solving skills

Benefits

• Incentive opportunities based on individual and company performance
• Medical/Dental/Vision
• 401k
• Charitable giving match
• 4+ weeks of paid time off a year, plus holidays and sick leave
• Stipend for fertility care or adoption
• Caregiver support
• Medical travel support
• On-demand apps and free confidential therapy sessions
• Onsite Café and gym
• Virtual classes
• Flexible environment

Before you apply

• Each candidate is limited to 10 applications across all open jobs within a 6-month period
• AI tools should not be used to generate or assist with submitted content or live interview responses
• By submitting an application, you agree not to disclose any confidential or proprietary information belonging to a current or former employer

About the company

Samsung Semiconductor is a global leader whose technology solutions power tools including smartphones, electric vehicles, hyperscale data centers, and IoT devices.