Sr. Signal Integrity Engineer - Serdes, Satellites (Starlink)

The role

You will have SI and PI ownership throughout the life-cycle of Starlink hardware. You will design, simulate, and troubleshoot signal and power integrity for advanced satellite hardware including wireline and electro-optical communication systems.

What you will do

• Specify, design, simulate, verify, qualify, and troubleshoot SI and PI aspects of advanced satellite hardware
• Work with wireline and electro-optical communication systems
• Work with high-speed and high-bandwidth memory interfaces
• Manage power needs and PDNs for associated ASICs
• Architect new products alongside RF, antenna, ASIC, packaging, mechanical, thermal, software, supply chain, and production engineers
• Derive top level specifications for PCB materials and channel subcomponents
• Design and optimize transition structures from die bump to die bump
• Drive detailed component selection for PDN designs
• Root cause and fix issues in PCB manufacturing, PCBA test, or satellite integration
• Define best practices, simulation workflows, test methodologies, signoff criteria, and lab equipment needs

Required qualifications

• Bachelor’s degree in electrical engineering, computer engineering, or physics
• 5+ years of industry experience designing circuits, electronic products, or hardware
• 2+ years of experience using one of the 3D EM simulation tools and high-speed digital channel simulators (CST, HFSS, ADS etc.)
• 2+ years of research or industry experience with high-speed digital design or power integrity
• Ability to work extended hours or weekends as needed for mission critical deadlines
• Some travel may occasionally be required

Nice to have

• Master’s degree or PhD in electrical engineering, computer engineering with emphasis in electromagnetic theory, transmission line theory, wireline transceivers, or power integrity
• 5+ years of electronic product experience designing hardware from concept through production
• 5+ years of experience architecting, implementing, and debugging cutting edge DSP based SERDES products (i.e. 56Gbps, 112Gbps, 224Gbps) working across package and PCB
• 5+ years of experience specifying, analyzing, debugging, and working with high speed, high bandwidth memory interfaces
• 5+ years of experience designing, implementing, and debugging power delivery networks for large processors, FPGAs, SoC, or ASICs with complex power requirements
• Thorough understanding of wireline transceiver concepts, architectures, and circuits
• Strong understanding of computers and programming languages (Python, C/C++)
• Demonstrated ability to work in a highly cross-functional role
• Experience with low loss laminates, high volume PCB manufacturing, and high-speed connectors
• Experience debugging and resolving EMI/EMC de-sense problems

Benefits

• Company stock or long-term cash awards
• Potential discretionary bonuses
• Ability to purchase additional stock at a discount through an Employee Stock Purchase Plan
• Comprehensive medical, vision, and dental coverage
• 401(k) retirement plan
• Short and long term disability insurance
• Life insurance
• Paid parental leave
• Various other discounts and perks
• 3 weeks of paid vacation
• 10 or more paid holidays per year
• Paid sick leave

Before you apply

• To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, o

About the company

SpaceX is actively developing the technologies to make human life on Mars possible. They are deploying Starlink, the world’s largest satellite constellation, providing fast, reliable internet to millions of users worldwide.