Principal ASIC Verification Engineer

The role

You will lead functional verification of ASICs used in Atom Computing's quantum computer. You will guide test-plan execution across engineers and contractors and contribute to testbench development, evaluation and debug.

What you will do

• Own block-to-chip verification plans, schedules and signoff criteria; lead test development and execution.
• Provide technical direction, mentor engineers, review test plans and code, and take part in candidate interviews.
• Define contractor scope, milestones and acceptance criteria; review deliverables and oversee integration and handoff.
• Develop Python testbenches, reusable drivers, monitors, reference models and scoreboards integrated with RTL simulators.
• Implement tests, automate regressions, debug failures and close coverage.
• Communicate verification status, unresolved defects and tapeout risks.
• Lead post-layout gate-level verification, including netlist preparation, SDF annotation and timing-accurate simulation.
• Verify test modes and patterns with DFT, design and physical design teams; resolve timing and signoff issues.
• Resolve requirements and interface issues with architecture, RTL, firmware and hardware teams; support silicon bring-up and validation.
• Perform other duties as assigned.

Required qualifications

• Bachelor's degree in electrical engineering, computer engineering, computer science or a related field, or equivalent experience.
• 10+ years of ASIC/SoC verification experience.
• Experience verifying multiple ASICs through tapeout and subsequent silicon evaluation, applying findings to improve verification.
• Experience with block-to-chip verification of registers, data paths and firmware interfaces.
• Strong Python skills for reusable, object-oriented testbenches with constrained-random stimulus, simulation control, checkers and coverage.
• Ability to build behavioral models of mixed-signal blocks, including their digital interfaces and timing.
• Experience turning design requirements into verification plans, writing SystemVerilog assertions and closing functional and code coverage.
• Hands-on post-P&R experience preparing netlists and cell/memory models, annotating SDF and debugging timing simulations.
• DFT verification experience with test modes and flows such as scan shift/capture, ATPG patterns, MBIST or JTAG.
• Strong RTL and waveform debugging skills, especially resets, clock domains, X propagation and timing checks.
• Proficiency with SystemVerilog/UVM, HDL debug tools, Linux and version control.
• Experience with regression automation, failure reproduction and triage.

Nice to have

• 15+ years of ASIC/SoC verification experience.
• Technical leadership through ASIC tapeout, including mentoring engineers, leading reviews, coordinating verification work and communicating risks.
• Experience directing verification contractors, defining scope and acceptance criteria, and reviewing delivery against quality and schedule commitments.
• Silicon bring-up or validation experience, including lab debug and correlating hardware failures with simulation.
• Experience with formal verification, equivalence checking, CDC/RDC, lint, emulation or FPGA prototyping.
• Familiarity with real-time control, signal processing or quantum hardware.

Benefits

• Fully paid medical, dental and vision insurance for employees and dependents.
• Unlimited paid time off.
• 401K company matching.
• Short- and long-term disability.
• FSA.
• Dependent care benefits.
• Life insurance.
• Drinks, snacks and catered team lunches in the offices every day.
• Annual bonus.
• Equity in the company.

About the company

Atom Computing builds quantum computers using arrays of optically trapped neutral atoms. The team includes scientists, engineers and business professionals working to advance quantum computing.